Operation of the HD44780

Registers
The HD44780 has two 8 bit registers, an instruction register (IR) and a data register (DR).

The IR stores instruction codes such as display clear and cursor shift, and address information for display data RAM (DD RAM) and character generator RAM (CG RAM). The IR can be written from the MPU but not read by the MPU.

The DR temporarily stores data to be written into the DD RAM or the CG RAM and data to be read out from the DD RAM or the CG RAM. Data written into the DR from the MPU is automatically written into the DD RAM or the CG RAM by internal operation. The DR is also used for data storage when reading from the DD RAM or the CG RAM. When address information is written into the IR, data is read into the DR from the DD RAM or the CG RAM by internal operation. Data transfer to the MPU is then completed by the MPU reading DR. After the MPU reads the DR, data in the DD RAM or CG RAM at the next address is sent to the DR for the next read from the MPU. Register selector (RS) signals make their selection from these two registers.

Register selection

RS  R/W  Enable  Operation                     
==  ===  ======  =========                     
 0   0   H,H->L  IR write as internal operation
                          (Display clear, etc.)
 0   1     H     Read busy flag (DB7) and      
                      address counter (DB0-DB6)
 1   0   H,H->L  DR write as internal operation
                       (DR to DD RAM or CG RAM)
 1   1     H     DR read  as internal operation
                       (DD RAM or CG RAM to DR)

Busy Flag
When the busy flag is "1", the HD44780 is in the internal operation mode, and the next instruction will not be accepted. As the Register selection table above shows, the busy flag is output to DB7 when RS = 0 and R/W = 1. The next instruction must be written after ensuring that the busy flag is "0".

Address counter (AC)
The address counter (AC) assigns addresses to DD and CG RAMs. When an instruction for address is written in IR, the address information is sent from IR to AC. Selection of either DD or CG RAM is also determined concurrently by the instruction.

After writing into (or reading from) DD or CG RAM display data, AC is automatically incremented or decremented by 1. AC contents are output as DB0-DB6 when RS = 0 and R/W = 1, as shown in the Register selection table above.

Display Data RAM (DD RAM)
The display data RAM (DD RAM) stores display data represented in 8-bit character codes. Its capacity is 80 x 8 bits, or 80 characters. On displays with fewer than 80 characters, any DD RAM that is not used for display can be used as a general data RAM. The relationship between DD RAM addresses and positions on the liquid crystal display are shown below. The DD RAM address is set in the Address Counter (AC) and is expressed in hexadecimal.

DD RAM addresses for a 40 character x 2 line display

With the 40 character x 2 line display provided by the LM018L, when a display shift is performed the display will "wrap round". A Left shift will cause the character previously at display position 1 to "drop off" the left end and reappear at display position 40. A Right shift will cause the character previously at display position 40 to "drop off" the right end and reappear at display position 1.

Character Generator ROM (CG ROM)
The Character Generator ROM generates 5 x 7 dot or 5 x 10 dot character patterns from 8-bit character codes. It contains 192 5 x 7 dot character patterns and 192 5 x 10 dot character patterns.

Character Generator RAM (CG RAM)
The Character Generator RAM is RAM with which the user can redefine character patterns in software. With 5 x 7 dots, 8 user-defined character patterns can be stored and with 5 x 10 dots, 4 user-defined character patterns can be stored.